PART |
Description |
Maker |
ACTS74HMSR ACTS74MS 5962F9671301VCC 5962F9671301VX |
ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14 Radiation Hardened Dual D Flip Flop with Set and Reset D-Flip Flop, Dual, with Set and Reset, TTL Inputs, Rad-Hard, Advanced Logic, CMOS
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INTERSIL[Intersil Corporation]
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MC100LVEL29DWR2 |
3.3V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset 100LVEL SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO20
|
ON Semiconductor
|
74HC74DR2 74HC74DR2G 74HC74D 74HC74 74HC74DTR2G 74 |
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS Dual D Flip-Flop with Set and Reset(带设置和复位的双D触发 双D触发器的设置和复位(带设置和复位的双触发器)
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ONSEMI[ON Semiconductor]
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HCS109HMSR HCS109KMSR FN2466 HCS109MS HCS109D HCS1 |
Radiation Hardened Dual JK Flip Flop HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16 Radiation Hardened Dual JK Flip Flop(抗辐射双J-K触发 辐射加固JK触发器拖鞋(抗辐射双JK触发器) From old datasheet system Flip Flop, JK, Dual, Rad-Hard, High-Speed, CMOS, Logic
|
Intersil, Corp. INTERSIL[Intersil Corporation]
|
74LV109 74LV109D 74LV109DB 74LV109N 74LV109PW 74LV |
Dual JK flip-flop with set and reset; positive-edge trigger LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16 From old datasheet system
|
NXP Semiconductors N.V. PHILIPS[Philips Semiconductors]
|
MC100EP01 MC10EP445 MC10H172FNR2 MC100EL29 MC100H6 |
3.3V / 5V ECL 4-Input OR/NOR 3.3V / 5VECL 8-Bit Serial/Parallel Converter Dual Binary 1-4-Decoder (High) 5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset 9-Bit TTL-ECL Translator Quad TTL-ECL Translator Dual 2-Wide 2-3-Input OR-AND/OR-AND-Invert Gate 3.3V / 5V ECL 8-Bit Synchronous Binary Up Counter 3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable 3.3V 10-bit LVTTL/LVCMOS to LVPECL Translator 3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock 5V ECL Voltage Controlled Oscillator 3.3V ECL D-Type Flip-Flop with Set and Reset Binary to 1-8 Decoder (Low) Differential -5V ECL To TTL Translator -3.3V / -5V Triple ECL Input to PECL Output Translator 5V ECL Dual Differential 2:1 Multiplexer Quad MSTR 5V ECL Quad 4-Input OR/NOR Gate 3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset Dual 4-5-Input OR/NOR
|
ON Semiconductor
|
SL74HC112 SL74HC112D SL74HC112N |
Dual J-K Flip-Flop with Set and Reset
|
System Logic Semiconduc... SLS[System Logic Semiconductor]
|
MC74HC74AD MC74HC74ADT MC74HC74AN |
Dual D Flip-Flop with Set and Reset
|
Motorola, Inc
|
IN74HCT109 |
DUAL J-K FLIP-FLOP WITH SET AND RESET
|
INTEGRAL[Integral Corp.]
|
CD54AC113A CD54ACT112 CD54AC112 CD54ACT113A |
Dual J-K Flip-Flop with Set and Reset Dual “J-K” Flip-Flop with Set and Reset Dual “J-K?/a> Flip-Flop with Set and Reset Dual “J-K Flip-Flop with Set and Reset
|
INTERSIL[Intersil Corporation]
|
GD54HCT76 GD54HC76 |
DUAL J-K FLIP-FLOP WITH SET AND RESET & CLEAR
|
ETC[ETC]
|
HCTS74MS HCTS74D HCTS74DMSR HCTS74HMSR HCTS74K HCT |
Radiation Hardened Dual-D Flip-Flop with Set and Reset
|
INTERSIL[Intersil Corporation]
|